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SMASH Tutorials
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Application Hardware Modeling
KEYWORDS: application hardware modeling, multi-level, multi-domain, mixed language,
behavioral modeling
Full-circuit simulations are very quickly limited by excessive simulation time as well as by
the availability of appropriate models. Simulation of a system cannot be effectively performed
at the most accurate level (commonly SPICE) both because it requires too much simulation
time and because multi-domain systems cannot be accurately modeled using a single design
language. Furthermore, when integrating components into a system, the system designer must
necessarily consider that they meet the specifications and that they individually work as
specified. The focus is then on verifying that the assembly in the system works as specified.
This tutorial presents the unique capabilities of SMASH for simulation of the Application
Hardware Model (AHM) of a system specific function by combining the models of each
component of the function at the appropriate description levels required for the analyses. The
goal of such simulations is to simulate the overall function to detect design defects in the
assembly and to verify the function performances.
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Audio Files Application 
KEYWORDS: audio, filtering, sampling, aliasing
The designer of an audio application will use a technical approach in order to check that the
design meets the requirements. For instance, he may verify that profiles are in accordance
with templates in the frequency domain or that SNR levels are correct for a sample of sine
waveforms (with fixed amplitude and frequency)...
However, evaluating the quality of an audio application is more subjective as it is linked to
the perception of the human hearing: it is much less a quantitative measurement. SMASH
enables designers to generate audio output files from the results of a time domain simulation
in order to listen to the effects of the application schematic.
SMASH also provides the ability to use an audio file as input of a transient simulation using
dedicated voltage or current sources. This enables direct driving of the input of an analog
circuit or driving of the input of a digital circuit through an ADC.
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Impedance Characterization and Hi-Z Nets Detection Tutorial
KEYWORDS: load, impedance, high-impedance net, floating net, HiZ, SPICE
High impedance (also known as hi-Z, tri-stated, or floating) is the state of a net which is not currently driven by the circuit or the nets that do not have any low impedance path to ground. Such high impedance nets are particularly sensitive to their environment and can pull-up or pull-down to an unexpected voltage value. This state is particularly difficult to check during design or test whereas it can lead to random circuit failure as well as yield drops. An innovative feature provided by SMASH aims at avoiding these failures by detecting Hi-Z nets and characterizing impedances of net.
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Multiple Operating-Points
KEYWORDS: multiple operating-points, steady state, SPICE
Finding DC operating points is the first and maybe the most determinant task for analog simulation. With the operating point analysis, SMASH proceeds through a complete search, using all heuristics in sequence, and gives the first stable result that is found. With multiple operating-points analysis, SMASH helps the designer to determine whether multiple operating-points exist and to identify meaningful ones in order to simplify eradicating unwanted operating-points which render the circuit useless when self-biased in such operating conditions.
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ModelSim to SMASH™ Tutorial "Convert .do to .pat"
KEYWORDS: Mixed signal, power consumption, conversion, ModelSim, compatibility
Mixed-signal IC and SoC design often implies interaction between different EDA solutions. This interaction (or even cosimulation) requires that simulators be interfaced through “backplanes” with cumbersome assembly of netlists, or explicit declaration of interfaces.
In this context, SMASH™ provides an easy to use feature that reduces and eases the time spent to convert a ModelSim based circuit description to a SMASH™ and SCROOGE readable format. This conversion is straightforward and very useful to simulate mixed-signal designs or to analyze the power consumption of complex digital or mixed-signal chips.
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DC Dispersion Sensitivity Analysis Tutorial
KEYWORDS: Design yield, Monte Carlo, reliability, dispersion
Sensitivity to dispersion is a new and efficient way to address circuit yield issue. For DC transfer and small signal analyses, SMASH now allows reducing time spent in dispersion analysis of circuits. From foundry data, you extract relevant parameters to introduce dispersion in component models. Indeed, threshold voltages VT, gain factor β dispersions are included in transistor models to take into account mismatch between components. SMASH then uses proprietary algorithms to evaluate local dispersion up to thousands of time faster than classic Monte Carlo analysis. Sensitivity to dispersion with SMASH is a faster method to perform circuit reliability analysis.
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HSPICE to SMASH™ Analog Netlist Format Tutorial
KEYWORDS: SPICE, netlist compatibility, flavor, accurate, solver
SMASH is a powerful circuit simulator that provides compatibility with most SPICE flavors and SPICE-like netlist syntaxes with an accurate analog solver. You can work with your preferred netlist syntax thanks to the FLAVOR directive of SMASH and you can easily transfer netlists from Hspice to SMASH in order to benefit from unique features of SMASH.
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PLL Jitter Tutorial
KEYWORDS: Jitter, Behavioral, Multi-level, Calibration, Noise
Evaluation of jitter in a design is a key issue difficult to address. Even if RF simulation solutions have provided some answers, all types of jitters can not be determined efficiently. SMASH provides a complete methodology combining multi-level simulation with calibration that provides a breakthrough solution for simulating properly all forms of Jitter with shortened simulation times.
High level models of different noise sources are elaborated to describe all components of a design at a behavioral level. Noise sources can then be included in the behavioral models, enabling a fast simulation of jitters. Transient or small signal noise analyses are used to calibrate a behavioral model at system level.
Illustration of this approach is given on the design of a basic PLL. The results obtained attest a reduced simulation time with a good accuracy.
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Imbalance Locate Tutorial
KEYWORDS: Design yield, Monte Carlo, reliability, dispersion, matching
The main drawback of classic yield analysis solutions based on Monte Carlo is that they do not provide the means to diagnose the causes of yield losses.
The patented Imbalance Locate innovation consists in providing the means to reproduce the error cases and to determine the disturbing devices.
Thanks to this extension to classic Monte Carlo, SMASH provides an efficient methodology allowing designers to diagnose which devices (transistors, resistors, capacitors...) are sensitive to dispersion and matching effects and cause yield losses.
With Imbalance Locate, go beyond detecting the error cases in a circuit to find the elements at the origin of the error cases. This methodology is an efficient way to accelerate analog design while increasing the robustness of the designs.
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Co-simulation with SystemC models
KEYWORDS: System C, behavioral, system level, VHDL
The SystemC description language is more and more frequently used to model and simulate new hardware designs at the system level. The need to integrate system level models into heterogeneous multi-level simulations is essential, thereby filling the design gap between system level design and HDL or SPICE design.
SMASHTM provides a SystemC model wrapper (C++) allowing the integration of SystemC models into a co-simulation with SMASHTM.
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SPICE Library Encryption Tutorial
KEYWORDS: Spice library, encryption, protection
For most component library or model parameter set providers, protection of component or parameter descriptions is necessary. In order to protect proprietary parameters, sub-circuits, models, or netlists, and to distribute libraries to customers without revealing sensitive information, SMASH provides an encryption solution. Its ease of use enables designers to protect all kinds of SPICE like libraries and even complete designs.
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Waveform Compression Tutorial
KEYWORDS: analog, mixed signal, waveform, compression, post-processing
Simulation of large analog and mixed signal systems requires lots of disk space. Observation of all signals and even sometimes only a subset of them can also take a long time to load. To face these drawbacks, SMASH offers a waveform compression algorithm which allows compression at two different levels:
1. when displaying the waveforms: all signals displayed in the waveform viewer are compressed, but the master file is preserved. Post-processing performed after simulation, such as measures, remain unchanged after compression.
2. when saving simulation data: depending on a user defined accuracy setting, only part of the calculated points are saved. This data compression is lossless as long as compression tolerances respect simulation accuracy setup, in which case all measurements will stay relevant. This functionality is quite useful for large simulations, such as parametric or statistic.
This useful functionality aims at reducing disk space occupied by large simulations or accelerating parametric and statistic analyses.
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SMASH 5 |
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Dynamic Electrical Rules Checking |
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Laker-AMS netlisting to SMASH |
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SmashLog |
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Jitter Simulation |
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The pdf documentation of the tutorials can be downloaded directly from this page. The tutorials are also delivered with SMASH and included in the download of SMASH Discovery, along with the support files needed to run the tutorials.
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