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SLASH AMS
Intuitive analog design
SLASH AMS is a complete front-end solution for analog design with hand-crafted logic: it offers a powerful, yet easy to use, schematic capture environment coupled with an accurate and efficient mixed-signal multi-language simulation engine. SLASH AMS delivers real ease of use for the designer combined with accuracy and extremely robust convergence for realistic results compared to silicon, both at operating-point and during transient analysis. The unique flexibility in support of SPICE flavors, for netlisting to diverse simulation or layout tools, is extended to analog behavioral modeling and simulation with the inclusion of Verilog-A.
SLASH AMS delivers THE efficient solution for structural (SPICE) and behavioral (Verilog-A) analog design including hand-crafted logic (Verilog Gate)!
Key Features
- Intuitive schematic driven design with dynamic link for cross probing
- Ease of use and productivity enhancing scriptable user interface
- Built-in handling of Design Contexts for multi-flavor SPICE netlisting
- Flexible netlisting for layout editing (SDL) and verification (DRC, LVS)
- True Analog & Mixed-Signal (AMS) with SPICE and Verilog Gate
- Fast and robust convergence with realistic results compared to silicon
- Speed and ease of analog debug with design yield optimization, floating net detection, impedance characterization…
- Proven on hundreds of designs “Right on First Pass”
- Easy import of designs from legacy ECS schematic capture family
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Description of the solution
SLASH couples the schematics link editor SLED with the single kernel mixed-signal simulator SMASH with tight integration for Schematic Driven Design:
- Schematic design context configuration is open and flexible allowing to target simulation, layout, verification… with support for appropriate SPICE flavors,
- Netlists are automatically loaded in SMASH after generation from the schematics editor,
- Simulation waveforms are displayed interactively during the simulation,
- Dynamic cross-probing highlights the waveforms corresponding to nets or devices selected in the schematics.
Above traditional structural analog design with SPICE, SLASH AMS opens the realm of analog multi-level behavioral modeling with Verilog-A. Beyond Analog & Mixed-Signal (AMS) design, SLASH provides the upgradable capabilities to address design challenges in the world of Logic & Mixed-Signal (LMS) design.
Design library browser
with dynamic access to
project work libraries &
Design Kit reference libraries |
Extensible and
configurable library of
SPICE components |
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Mixed-signal design, thanks to mixed language capabilities
Customizable & User friendly GUI: colors, grid & configuration, property editors for libraries, cells and pins…
Easy access to netlists: multilingual & hierarchical netlists generated in de-facto or IEEE standards languages such as SPICE and Verilog-HDL
Dynamic link to SMASH: netlist loading in a single click!
And direct cross-probing from schematics to waveforms
SLED also allows:
- ASCII format for saving symbols, schematics…
- Hierarchical net highlighting
- Batch netlisting
- And more…
SLED provides:
- All-in-One capability
- Unique & patented debug methodology
- Ease of simulation set-up and analysis
- Waveform expression editor
- And more…
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< SMASH Options
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