Dolphin Integration brings relief to Assertion-Based Verification
Grenoble, France, June 10, 2011
New releases of SLED SDG and SMASH provide extended support of PSL, the Property Specification Language, allowing the generation of property-based random test patterns and the verification of PSL assertions on designs using multiple clocks.
SMASH 5.17 also provides state-of-the-art compliance with the subset of System Verilog Assertions (SVA) dedicated to Assertion-Based Verification.
Dolphin’s standalone waveform viewer ICD, the Interactive Curve Display rel. 1.1, will provide the capability to apply PSL assertions by post-processing existing waveforms coming from any simulator. Simulation results can be post-processed as many times as needed to design a verification plan with new assertions. New or updated assertions can be applied to the simulation results without simulating again the device under test. The screenshot below also shows how assertions can be applied and visualized in ICD.
Free discovery options of these new releases of SLED, SMASH and ICD will be available for download before June end.
In the meantime, do not hesitate to contact the EDA Marketing Manager, Nathalie Dufayard, at solutions@dolphin-integration.com.
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