FlexMod - Flexible Modeling and Simulation with SLASH
Modeling and simulation of sub-system functions
Design and validation of ever more complex systems demands selective modeling and simulation in order to verify that performances are reached! Indeed, when integrating high resolution and high performance Silicon IPs, the intrinsic performance of each device is not sufficient to guarantee the performance of the final application. Issues such as pop-up noise, crosstalk, power noise, Signal to Noise Ratio (SNR)… can appear during the integration process and degrade the performance of the final product.
These issues can in fact only be managed if treated globally through the adequate levels but not necessarily by simulating the complete system.
To secure quality and reliability of products, and ensure the best Return-on Investment, it is mandatory to simulate the subsystem!
A subsystem is a set of components dedicated to one function and configured for a specific application. It can spread from the Virtual Components of silicon IP (ViC) to the PCB and its peripherals plus the system software. See below an example of subsystem spreading through 4 levels:
Selective modeling and simulation of subsystems aims at analyzing the application schematics hot spots.
Functional synoptic
Through a unique approach of functional synoptics, Dolphin’s Application Engineers point out integration issues that must be handled by the SoC integrator and/or the PCB integrator (and first by the Application Engineer) as "hot spots".
These hot spots should be taken into account at simulation stage in order to anticipate performance degradations and avoid costly diagnostics.
Jittered clock (1)
Low SNR at system-level (2)
Noisy power supply (3)
Inappropriate data synchronization (4)
Application Hardware Modeling (AHM)
The identification of a subsystem function and the modeling of the components to simulate are the basics of Application Hardware Modeling (AHM)!
The main challenge to succeed in simulating a subsystem is to create the adequate models at the relevant abstraction levels with the appropriate accuracy. Traditional SPICE models for board simulation may not be appropriate for the simulation of application schematics (ASC) as they are not representative of the behavior, effects, degradations… which must be observed, such as supply noise, jitter, pop-up noise… Besides, the use of transistor-level models systematically ends-up in too long and even undoable simulations whereas full-chip simulation of the SoC fulfills different purposes.
As it is illusory to think that one behavioral model can represent all functionalities and performances of the transistor-level model, a good behavioral model is selective and should be designed as equivalent to the transistor-level model for a selected set of features or performances (SNR, THD, Jitter…)!
It is therefore the role of Silicon IP suppliers to provide their customers with behavioral models of the components to ease their integration and allow the simulation of subsystems through selective modeling.
Key benefits of Application Hardware Modeling
Anticipate the degradations linked to the integration of components in the system to avoid costly diagnostics at prototyping stage
Some issues are impossible to fix in prototypes (e.g. crosstalk between two analog functions connected to the same pads and supplied with an external regulator cannot be handled on board)
Validate the performance of a subsystem function with the reference application schematics
Optimize the cost and the performance of the application schematics to find the best trade-off between Bill-of-Material and Silicon cost.
Improve the yield and the time-to-market of the final system
Application Hardware Modeling (AHM) adds, to structural modeling, the power of behavioral modeling to assess through simulation the performance of a subsystem function throughout the four levels. It consists in identifying the relevant parts contributing to the subsystem performance and in wisely combining SPICE and behavioral models of the components for treating through simulation the global issues spread through all levels.
Application Hardware Modeling in traditional EDA flow
The Application Hardware Modeling flow completes traditional EDA Design flows by bringing the methodology for optimizing application schematics.
Selective modeling increases productivity and feasibility
When SLASH revolutionizes Application Hardware Modeling…
Flexibility is the key attribute for solutions enabling to perform Application Hardware Modeling and simulation. SLASH is the best candidate as it delivers a user-friendly interface and powerful functionalities to ease the creation and validation of models!
Dolphin Integration’s schematic capture SLED and simulator SMASH, bundled as SLASH, have been conceived to make multi-level and multi-domain modeling and simulation easier:
Support the most common modeling languages: SPICE, Verilog (SystemVerilog), VHDL, Verilog-A, VHDL-AMS, C...
Any function can be modeled with behavioral or transistor-level languages and some HDL-A language can be used for sensors and actuators.
Enriched, with the innovative and relevant EMBLEM libraries, to structurally assemble behavioral models for specific applications such as MEMS, motors…
Any user, either an expert or a beginner, is thus able to build-up the models to simulate a complete system function seamlessly mixing electronic and mechanical blocks.
Compatible with big frameworks and complementary solutions (Hspice, Modelsim, Pspice…).
No need for remodeling as it can accept models coming from various suppliers at different levels.
SLASH also grants the best solution for verifying multi-domain/level models:
Offer specific features for logic and analog designers to verify the equivalence between the behavioral model and the reference which can be a specification, a transistor-level model, measurement results... The equivalence between the two must be verified regarding only some identified features or performances.
Besides, SLASH answers the need of Application Engineer for flexibility of use:
Available identically under Linux and Windows and can be installed on laptop or USB dongle.
SMASH provides innovative features for taking into account degradation sources and propagation channels and for characterizing application schematics performances:
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