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Flash announcement

DOLPHIN Integration upgrades SLED and SMASH delivering block-busting innovation

 

Grenoble, France, July 2, 2010

Last week, Dolphin Integration delivered block-busting upgrades of their schematic editor SLED optimized with their multi-domain simulator SMASH.

SLED 1.6 provides the means for logic and analog designers to easily and graphically assemble multi-level and multi-domain designs. Handling the disciplines of pins has been integrated into the symbol editor in order to deliver straightforward and secure multi-domain schematic editing with built-in multi-language netlisting in SPICE, HDL and HDL-AMS. Discipline handling prepares the extension with automatic design checking to ensure that only compatible pins are interconnected, such as but not limited to, multi-domain designs which mix mechanical and electrical signals, multi-voltage designs mixing 3.3V and 1.8V signals, etc.
A specific highlight has also been focused on enhancing teamwork awareness with the possibility to share configurations of Design Rule Checkers and to automatically detect external modifications in a design.

SMASH 5.15 benefits from major improvements in terms of speed and language compliance, principally for Verilog and Verilog-A descriptions in addition to SPICE.
In conformance with previous announcement, this release offers the capability to perform template-based equivalence checking. Designers can either check that the implementation of an analog block matches its specification, or that a behavioral analog model of a block is equivalent to its implementation. This functionality can also be used for verifying integration rules such as the Jitter characteristics of a PLL, or the SNR of a CODEC.

For more information on the new features, feel free to download the presentation sheets of SLED 1.6 and SMASH 5.15 or contact Nathalie Dufayard at solutions@dolphin-integration.com

The free discovery options are available for download at: www.dolphin.fr/eda

 

 

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