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Description |
Overview
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Download |
| SoC Integration |
SLED SDG |
Automatic generation of synthesizable RTL modules from assertions (PSL/SVA) |
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SCROOGE TLA |
Hierarchical mixed signal power consumption estimation with clock-tree emulation and SPEF back-annotation |
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SMASH |
Multi-domain mixed-signal simulation for subsystem performance optimization and validation |
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SoC GDS |
VSIA socket generator for hierarchical SoC Integration of Virtual Components |
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