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Description |
Overview
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Download |
| System Level |
COSMOS |
Cosimulation of mixed-signal and system-level blocks coupling SMASH with MATLAB |
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SUCCESS |
Hardware/Software co-design coupling SMASH with Ride or µVision |
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SMASH |
Multi-domain mixed-signal simulator for behavioral modeling of systems in HDL-AMS |
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VDALIBS |
VDA automotive libraries bundled with SMASH (VHDL-AMS) |
pending |
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EMBLEM Mecha |
Library of basic effects for MEMS design (VHDL-AMS) |
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EMBLEM Drive |
DC-motor effect library for complete system design (VHDL-AMS) |
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| SoC Integration |
SoC HLE |
SoC Hierarchical Link Editor of the fourth generation |
pending |
pending |
SCROOGE |
Hierarchical power consumption estimation with clock-tree emulation and SPEF back-annotation |
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SMASH |
Multi-domain mixed-signal simulation for hierarchical Virtual Test & Diagnostic |
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SoC GDS |
VSIA socket generator for hierarchical SoC Integration of Virtual Components |
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| Frontend Design |
SLED |
Schematic Link Editor with dual capability for Graphic Entry and for Scriptability |
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SMASH |
Mixed-signal multi-language simulator for mixed modeling of ASICs in SPICE, Verilog-HDL, VHDL… |
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| Characterization |
SHAKER |
Simulation iterator for automatic characterization and datasheet extraction |
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SMASH |
Mixed-signal simulator for characterization of ASICs in SPICE, Verilog-HDL, VHDL… |
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| Backend Layout |
SoC GDS |
Fast layout viewer and processor for structured layout and advanced verification |
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GDS Compiler |
Development platform for layout array generator development |
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| Mask Shop |
RYCS |
Reliability and Yield Control Structures |
pending |
pending |
GDS Reticle |
Constraints based frame layout placement optimizer for scribe line test structures |
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