Communication
Contacts
Offering
Investors
Careers
Sesame
Embedded memories
Logic virtual components
Analog virtual components
Test structures
Hardware/Software Codesign
Virtual test & diagnostic
Hardware/Software Codesign
Layout verification
Quadrant of skills
SoC Integration
Custom Fabless Supplier
 
 

Search dolphin:

silicium estimator

 

Sofia Benchmark

 

Simple process
For standard cell designs
Representativity

 

In order to compare quickly but correctly libraries with different structures like reduced libraries and traditional libraries, a benchmark of a new kind is now available.

Key Benefits of SOFIA Benchmark

  • Simple benchmark
    It takes around 15 minutes to get the comparison results!
     
  • Representativity
    The Sofia benchmark is using 6 cells representative of the typical paths in a majority of logic circuits.

 

Evaluation Process

Each cell is weighted depending on the percentage that it represents in the path, issued from on a large sample of circuits. These weights vary depending on if it is a traditional library or a reduced library like SESAME.

  • For each of the 4 criteria: area, dynamic power, leakage, speed, a table with the 6 weighted cells is provided. See example below for area:
Area
the value is defined as the area of the smallest cell of each type
in µm2
FlipFlop (dfc3)
Simple boolean (nd21)
Complex boolean (anr2)
Multiplexer (mx22)
Adder (add2)
Inverter and buffer (in01)
FoM area
Value
Weight
Value
Weight
Value
Weight
Value
Weight
Value
Weight
Value
Weight
SESAME HD-BTF
14 %
35 %
29 %
9 %
3 %
21 %
#DIV/0!
Competitor's library
14 %
29 %
40 %
2 %
1 %
14 %
#DIV/0!
  • Fill in the area values for each cell of your library. These values can be found in the .lib file and are prefilled-in for Dolphin’s library
  • Once each value is entered in the table, you will get the “Figure of Merit” (last column “FoM” in the example) of each library on the selected criteria
  • Repeat the same steps for the other criterions: dynamic power, leakage, speed
  • The global Figure of Merit, representing the overall performance of the library, is based on the multiplication of the Figure of Merit of each criterion (area, dynamic power, leakage, speed), giving the same importance to each of the main criterion. The importance of each criterion can be weighted to reflect the chosen optimization of the SoC.