MOTU UTA standard for logic
Benchmarking Freeware |
For standard cell designs |
Open to any style of logic |
Motu Uta is a public standard for choosing the best Standard Cell Library without falling into the traps of traditional benchmarking methods
Avoiding the traps of traditional benchmarking methods
The challenge of Standard Cell Library selection for users is that no library provider can reasonably announce in advance the performances on its proprietary library on the User’s undefined circuit.
The performances of any logic block indeed depends on: the library, the design, the benchmark and the SoC Integrator’s capability for floorplanning and optimizing the implementation of logic blocks using the P&R EDA tools.
The benchmark traditionally used in the industry to benchmark Standard Cell Libraries is the so-called cell-by-cell approach most of the time based on performances comparison of the NAND2.
This cell-by-cell approach has tree major drawbacks:
- It only assesses a few cells, which are not necessarily representative of the User’s SoC
- It is not relevant for benchmarking libraries with different structures such as a traditional Complex Cell Stem Library and a Reduced Cell Stem Library
- It does not take into account the implementation issues linked to the logic flow
Comparing Standard Cell Libraries objectively requires to use a standard circuit, preferably non proprietary and therefore publicly available, and requires to define appropriate benchmarking conditions.
To avoid disillusion on Standard Cell performances, Dolphin Integration proposes to Standard Cell users to benchmark libraries on the Motu Uta public Standard for logic (RTL logic block).
Motu Uta, the truthful method for assessing the performances of standard cell libraries
The purpose of the Motu Uta Standard for logic is to enable benchmarking of performances of any Standard Cell Library by performing synthesis, placement, clock tree synthesis and routing based on a given benchmark.
Thanks to its structure, Motu Uta is representative of typical logic blocks in all dimensions: area, power consumption and speed.
With a benchmarking of Standard Cell Libraries on the Motu Uta Standard, the comparison is not only made on electrical or physical performances (timings, power consumption, area) but also on the performances in terms of implementation (time to silicon…)
For each technological process, Dolphin Integration provides a dedicated Hockey Stick benchmark. This benchmark is a list of constraints providing all the needed information to set the constraints for Motu Uta through the stages of the logic flow: synthesis of the data paths and construction of the test paths, placement and construction of the power supply network, construction of the clock paths, routing and timing analysis.
PERFORMANCES OF SESAME Reduced Cell Stem Library on the Motu Uta Standard
EVALUATION PROCEDURE of the Motu Uta Standard
DOWNLOAD MOTU UTA: The standard for logic benchmarking
SUCCESSFUL IMPLEMENTATION OF THE MOTU UTA STANDARD: Diploma of Achievement awarded
Key Benefits of Motu Uta
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Public logic standard
No need to set up any touchy agreement to get access to Motu Uta
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Make a decision based on reliable results
Comparison of various solutions on an equal basis
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Assess the performances of your standard cell library and compare with results for Sesame stem
Silicon area, leakage, maximum frequency, power consumption
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Support from Dolphin Integration
Access to benchmarked performances of the Dolphin library: silicon area, leakage, maximum frequency, power consumption
No need to deliver the Dolphin Integration library
Engineering support to perform the evaluation if needed
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Save time
A few hours to obtain the results from evaluation (synthesis - place & route - optimization)
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Guidelines
Just follow the guide and apply step by step the evaluation process
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Contents
Motu Uta is comprised of two main logic blocks:
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A processor with a register-ALU-register and a register-decoding-register, representative of the critical path inside a processor
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A state register to perform a specific calculus and a shift register. The critical paths which have been represented are register-logic-register and register-register. This block is based on two clocks domains, one for the shift register and calculus and one for the shift register.
Motu Uta is designed for easy extensions to address any odd type of circuitry. Dolphin shall ensure implementation of these extensions while maintaining the Freeware status of Motu Uta.
Thanks to this architecture, Motu Uta is representative of any typical logic block in all dimensions: area, power consumption, leakage and speed.
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