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Single-Port RAM JUPITER-XAM[VS] SpRAM-LP 0.25 μm
Low Power |
High Density |
Voltage Scaling |
Key features
- Functionality targeted from 2.75 V down to 1.2 V!
- Optimized for high design yield
- Low-power consumption
- Reduced injection noise
- Byte write capability (optional)
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Product Overview
- Proprietary architecture JUPITER for Single-Port RAMs:
Micro-bit-line scheme combined with patented XAM bit-cell for low dynamic power consumption
- Self-sequenced circuitry for ensuring robustness against process deviations.
- Flexible pricing models
Embedded memories are licensed as instances (commonly called cuts) or as generators and are uniquely packaged to address the diversity of needs, be they for a Fabless supplier targeting a single SoC or for the Business Unit from a large corporation targeting several sources.
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Reliability & Robustness
- Unique design techniques ensuring immunity against process deviations (self-sequenced circuitry…), together with key patents.
- Stringent validations with (1) over stressed conditions, (2) electro-migration assessment,
(3) evaluation of sensitivity against device mismatch, 4) accurate modeling and simulation techniques for monitoring peaks of current…
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Flexibility
| Generator flexibility |
Min |
Max |
Granularity |
| Memory Bit Capacity |
1 K |
512 K |
NA |
| Number of Words |
128 |
65536 |
1 |
| Number of Bits per Word |
8 |
64 |
1 |
Performances in following conditions for 0.25 μm
- Generic transistor option with 6T patented XAM Bit-cell
- Typical case conditions: TT, 2.5 V, 25°C with the so-called “Pessimistic benchmark” for Dynamic consumption (100% active cycle)
- Our architecture guaranties fabrication yield with the read margin larger than -10% of the effective power supply
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Deliverables |
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- Specifications
- Simulation models (VHDL/Verilog)
- Timing files (TLF)
- Synthesis model (.lib, .db)
- Abstract file (LEF)
- Data Sheet
- Transistor netlist (CDL)
- Layout (GDSII)
- Test vectors
- Validation plan
- User’s Guide and Install Note
- Integration guidelines
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Optional for generator development
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