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silicium estimator

8-bit 16-bit 32-bit Microcontrollers

All performances are given in TSMC 18 µm process - other process nodes are available on request

  PERFORMANCES SUCCESSIVE DOWNLOADS
IP CORE Speed /80C511 Speed /80C512 DSP Area 3


mm²
Processing
power
4

DMIPS/MHz
Code
density 5

Bytes
Consumption 6 Discovery Assessment
µA/MHz µA/DMIPS Brochure Product Primer MCU Other Performance
Flip 8051 (12 cycles/instruction)
Cycle compatible 8051
x 1 x 1 N 0.009 100 19 2.111      
Flip 8051 Wind x 2.4 x 3 N 0.037 0.026 100 19 731 Available Available Available Contact
Flip 8051 Cyclone x 8 x 9 N 0.079 0.074 100 44 595 Available Available Contact
Flip 8051 WHIRL(16)-Cyclone x 8 x 12.5 Y 0.132 0.074 100 50 676 Available Available Contact
Flip 80251 Typhoon - N 0.148 0.296 54 62 209 Available Available Available Contact
Flip APS32 - N 0.112 0.71 75 347 487 Available - Available Contact
Flip80515 x1 - - - - - - - - On request - -
Flip83152 x1 - - - - - - - - On request - -

All area, power, and frequency numbers are subject to changes based on each user's chosen process technology, cell library, and EDA solutions.
1 Acceleration based on the Dhrystone V2.1
2 Acceleration based on the overall instruction set of 8051
3 Slow case conditions - TSMC 0.18 µm process (1.62 V, 125°C) - using SESAME uHD library, without Scan - after synthesis
4 Dhrystone v2.1 / 200 loops
5 Average density calculated on several benchmarks
6 Typical case conditions - TSMC 0.18 µm process (1.8 V, 25°C) - using SESAME uHD library including wire load and clock tree consumption (+30%), without Scan - post synthesis
7 With automatic clock gating