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Flip80251-Typhoon - 16-bit Microcontroller
upward compatible with 8051
Download Product Primer 
Compared to 8051 standard:
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Up to -46% program code size |
Up to x 10 lower power |
Up to x 33 more powerful |
16-bit architectures are known historically for their economic efficiency: they provided the fundamentals for the minicomputer revolution of the seventies, then for the PC revolution of the eighties. Virtual Components of Silicon IP for Systems-on-Chip have emerged and thrived on both 8-bit and 32-bit architectures, and somehow inadvertently skipped its most promising notch.
Here comes the Flip80251 Typhoon which is the ideal solution for an upgrade of an existing 8051 application: increase the performance and reduce the cost thanks to the better code density.
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Key Benefits of 16-bit Microcontroller
The Virtual Component Flip80251 « Typhoon » is an accelerated version of the Intel 8051 microcontroller. It is 100% binary code upward compatible with the legacy 8051 but optimized for the best Performance/Complexity ratio.
The architecture provides a significant code size reduction when compiling C programs.
Its enhanced pipeline architecture provides an increase of processing speed average of 2 times, when running at the same clock frequency as a standard 80C251 and up to 33 than a standard 8051.
The extra processing power can be used, either to increase the performance of any 8051/C251-based application, or to run the same application at a lower clock frequency so as save power up to 90% compared with 80C51!
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Product Presentation of 16-bit Microcontroller
Compatibility with 8051 microcontrollers
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CODE COMPATIBILITY
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BUS COMPATIBILITY
High performance CPU, either for higher
computing power or for low power consumption
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4 stage pipeline architecture
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1 cycle / instruction for most of the instruction
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1 instruction fetch every clock cycle
Superior code density
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Enhanced 8051 instruction set with
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16-bit and limited 32-bit data transfer, arithmetic and logic instructions
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Register-to-register operations
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Extended addressing modes
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Improved control instructions
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Bigger bit addressable space
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24-bit linear addressing for up to 16 MB memory space
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64 KB extended stack space and additional stack instructions
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Register-based machine with 40 8-bit-registers accessible as byte, word or
double-word. All registers are general-purpose with accumulator functionality
and data indexing capability.
Configurability of core and Peripherals
Peripherals
- 16-bit Timers / Counters
- Watchdog Timer
- Enhanced UART, SPI, I2C (Master)
- Programmable Counter Array
(compare & capture modules )
- Clock Power Management Units
- Cache Controller (delivery pending)
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Deliverables (soft level)
- RTL synthesizable model (*)
- Virtual testbench
- Test Patterns
- Timing constraints
- Documentation: ViC specifications, users guide
(*) Option : hard-level delivery for benefiting from high density/low power performance of SESAME standard cell library |
Processor Performances
Architecture |
Processor |
Area* |
Code size** |
Processing power*** |
Power consumption**** |
TSMC 0.18 (mm2 ) |
(relative) |
(DMIPS/MHz) |
Acceleration |
(µA/MHz) |
(µA/DMIPS) |
8-bit |
Flip8051 (12 cycles/instruction)
Cycle to cycle compatible with legacy 8051 |
0.037 |
100 |
0.009 |
1 |
19 |
2,111 |
8-bit |
Flip8051 Cyclone (1 cycle/instruction) |
0.079 |
100 |
0.074 |
8 |
44 |
595 |
16-bit |
Flip80251 Typhoon |
0.148 |
54 |
0.296 |
33 |
62 |
209 |
All area, power, and frequency numbers are subject to changes based on each user's chosen process technology, cell library, and EDA solutions.
(*) Post synthesis area, in TSMC 0.18 µm process with SESAME µHDvLC library @ 50 MHz in slow case condition (1.62 V, 125°C)
(**) Average density calculated on several benchmarks incl. Dhrystone v2.1
(***) Based on Dhrystone v2.1 / 200 loops
(****) Power in Typical case condition - TSMC 0.18 µm process - 1.8 V, 25°C including wire load and clock tree consumption (+30%) using SESAME uHDvLC library
Power Saving thanks to 80251 Core
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Efficiency in power consumption when providing the same computing power:
Flip80251 can reduce drastically the power consumption compared with any 8051 microcontroller with the same computing power:
Flip80251-Typhoon is 10 times less consuming than a standard 8051 for processing the same task, and at least 3 times less consuming than any accelerated 8051. |
Code Density
An enhanced instruction set and a linear addressing permit to support a larger code and data memory requirement with no need for code or data banking.
As a result, the code density with the 16-bit Flip80251 is far better than with an 8-bit 8051-based architecture.
Moreover, the computing power is increased by a factor 33 !
0.009 DMIPS / MHz →x 33→ 0.296 DMIPS / MHz |
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Area Saving
When comparing the silicon area of Flip80251 + its program memory (e.g. located in RAM) versus the silicon area of the Flip8051 Cyclone in the same configuration, area savings reach up to 41 %, thanks to the better code density.
Area saving will depend on code memory capacity, if it is embedded or not, and on the type of memory: RAM, ROM, Flash…and on the fabrication process. |
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_____________________________________________________________________________
Cosimulator SUCCESS™
SUCCESS is a virtual HW/SW co-verification tool that enables to execute the application program against the HDL description of your SoC. Rather than waiting for the physical prototype to run boot code and diagnostics, SUCCESS can run them before tape-out, on your virtual prototype.
SUCCESS-251 is the coupling of an IDE (Keil™ µVision3®) with Dolphin’s SMASH mixed-signal simulator, enabling software development early in the project schedule.
HW & SW cosimulation
Debug Station
A complete set of Hardware emulator ranges from a mainly software solution (virtual emulator) as the most economic choice, through XSmart, the richest in Tracing features, up to BIRD, Built-in Real-time debugger. The optimal solution for each major goal!
Debug station Overview
< 16-bit overview |
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