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Libraries of Standard Cells and Memories

 

Since more than 20 years, Dolphin Integration has continuously enriched their offering of embedded Memories and Standard Cell Libraries so as to offer Off-the-Shelf products from 180 nm down to 40 nm endowed with differentiated optimizations to address a diversity of SoC requirements.

Our current priorities are:

  • To design robust products
  • To design products not only optimized for Low Dynamic Power and Low Leakage but also optimized for High Density and High Speed
  • To offer complementary options such as BIST
  • To target diverse foundries for each technological process

 

Dolphin Integration Silicon IP panoply includes Standard cell libraries, Embedded Single Port and Dual Port RAM, Embedded Single Port and Dual Port Memory Register and Metal Programmable ROM, all optimized for a specific SoC requirement and Foundry process.

 

Our Offering by technological nodes and optimizations

Our architectures of Memories and Standard Cell Libraries are optimized for:

registration
  • High Density - Low Power: Integration for the lowest cost
    • Density and Power optimized silicon IPs
    • Density optimized power supply network
    • Density optimized P&R, testing
  • Low Power and Dual Voltage: 3 operating modes to minimize dynamic power depending on the sequence of activity
    • Nominal Voltage active mode
    • Low Voltage active mode
    • Extinction mode
  • Low Power and Low Voltage: 2 operating modes to minimize dynamic power depending on the sequence of activity
    • Low Voltage active mode
    • Extinction mode
  • Ultra Low Leakage: 3 operating modes to minimize leakage depending on the sequence of activity
    • Nominal Voltage active mode
    • Retention mode
    • Extinction mode

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