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Catalogue > HD-LP Panoply 90 nm

Panoply 90 nm: High Density - Low Power

 

To maintain or increase their strength on the market, manufacturers of high density consumer and nomad devices must regularly offer more features to their end customers - while maintaining competitive pricing. Because of this trend, finding the best compromise between low power and cost reduction is a significant challenge for SoC designers.
The solution is introduced with a complete Panoply optimized for High Density and Low dynamic Power.
The panoply includes Single Port and Dual Port RAMs, metal programmable ROMs, Register Files and standard cells.

⇒ See possible Architectural implementation

Typical gains Core VDD +/-10% Consumption at Nominal Voltage * Area Reduction *
90 nm LP 1.2 V Reduced by up to 50% Up to 10%

* Comparison with traditional libraries

 

 

Catalogue

Due to the diversity of foundries, process nodes and variants addressed, make sure to check with us the availability of any Panoply.

Product Type Product Name Capacity foundry* Presentation sheet Evaluation kit
           
Standard Cells SESAME HD - TSMC Available Available
Single port RAM SpRAM RHEA-HD/RR 8 k - 512 k TSMC LP Available -
Metal Programmable ROM sROMet PHOENIX 16 k - 1 M TSMC LP Available Available
TSMC G -
Metal Programmable ROM tROMet PHOENIX 1 M - 8 M TSMC LP Available -
85 nm          
Single port RAM SpRAM RHEA-HD/RR 8 k - 512 k TSMC uLP Available Available
Single port RAM SpRAM RHEA-HD/RR LV 8 k - 512 k TSMC uLP Available
           

⇒ See our complete Catalogue for 90 nm

 

Best with

Product Name Description Presentation sheet
     
SESAME BiV Standard Cells for direct battery connection Available
     

 

 

Architectural implementation

registration

Selecting separately the smallest Silicon IPs from different providers does not guarantee the achievement of the highest overall density SoC: for instance the area savings of high-density sRAM could be offset by a bigger regulator caused by higher dynamic power consumption!
To assist SoC Integrators in their permanent search for minimizing costs, Dolphin Integration offers a complete panoply of memories, register files, standard cells and their associated regulators. This panoply is designed to ensure the best individual density of each component and efficient integration to allow maximal area savings when combined in the same SoC.


Ask for more information about our High density-Low Power Panoply 90 nm, please click here