Catalogue > HD-LP Panoply 180 / 160 / 152 nm Panoply 180 / 160 / 152 nm: High Density - Low Power   To maintain or increase their strength on the market, manufacturers of high density consumer and nomad devices must regularly offer more features to their end customers - while maintaining competitive pricing. Because of this trend, finding the best compromise between low power and cost reduction is a significant challenge for SoC designers. The solution is introduced with the HD-LP Panoply, specifically designed to guarantee the best RoI for consumer applications. The panoply includes Single Port and Dual Port RAMs, metal programmable ROMs, and standard cells. ⇒ See possible Architectural implementation Typical gains Core VDD +/-10% Consumption at Nominal Voltage * Area Reduction * 180 nm G 1.8 V Divided by up to 2 Up to 20% * Comparison with traditional libraries     Catalogue Due to the diversity of foundries, process nodes and variants addressed, make sure to check with us the availability of any Panoply. Product Type Product Name Capacity foundry* Presentation sheet Evaluation kit 180 nm           Standard Cells SESAME eLC - TSMC G SMIC G Available Available SMIC EEPROM Available Standard Cells SESAME HD - TSMC G SMIC G … Available Available Standard Cells SESAME HD - TSMC eLL Available Available Standard Cells SESAME uHD-BTF - TSMC G … Available Available Islet Construction Kit SESAME ICK - TSMC eLL Available Available Single port RAM SpRAM PLUTON eLC-HD 512 - 512 k TSMC eLL Available Available TSMC G Available Available SMIC EEPROM Available Available SMIC G - - Single port RAM SpRAM PLUTON eLC-RR (Retention Ready) 512 - 512 k TSMC eLL Available Available TSMC G Available Available SMIC EEPROM Available Available Dual port RAM dpRAM MARS-XAM 1 k - 64 k TSMC G … Available - Metal programmable ROM dROMet CASSIOPEIA 1 k - 1024 k TSMC G Available Available TSMC eLL Available TSMC ULL - SMIC G On request Silterra Available SMIC EEPROM Available Available 152 /153 nm           Metal programmable ROM dROMet CASSIOPEIA 1 k - 1024 k TSMC G … Available Available Single Port Memory Register 1PRFile CALYPSO 128 - 64 k SMIC G … Available -             ⇒ See our complete Catalogue for 180 nm   Best with Product Name Description Presentation sheet       SESAME BiV Standard Cells for direct battery connection Available tROMet CASSIOPEIA Late-programmable ROM with patented ultra High density bit cell Available           Architectural implementation The HD-LP Panoply is the demonstration of Dolphin Integration’s technical know-how on low power architecture and mastery of high density bit-cell design. The following schematic proposes a density and power optimized architectural implementation: The dynamic power consumption is reduced by embedding low power consumption memories and libraries of standard cells The density is increased by the individual density of each component and the efficient integration to allow maximal area savings when combined in the same SoC Ask for more information about our High density-Low Power Panoply 180 nm, please click here

Standard cells Memories

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