tROMet uHDeLL Phoenix 90 nm
Writing into a ROM its program puts paradoxical demands: enabling high-density while postponing the program layers to the least dense levels. PHOENIX is such a late-programmable ROM thanks to a key patent for reaching ultra-high-density for large capacities starting at 1 Mbit. It stars the brand-new proprietary architecture optimized for ultra-low-leakage. It embeds smart and optimal pre-charge circuitries consuming a mere 1.8 uA for a 6-Mbit instance in TSMC 90 nm LP!
Positioning & Differentiators
Key Features
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Key patent “two in one” for ultra-high-density for large capacities starting at 1 Mbit
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Ultra-low-leakage even in generic process:
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Optimized for high DfY i.e. no compromise at the cost of design margins such as read margin
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Protection against piracy thanks to : patented bit cell and customized scrambling capabilities
Add-on kit & Peripherals (optional)
Powerful ROM Writer
By programming 2 bits per transistor, 4 decoding possibilities per cell requires a powerful ROM Writer allowing multiple programming.
The Scrambling advantage
The address scrambling feature customized for each users' needs may include protection structures involving addressing schemes for word-lines, bit-lines, memory bit-cells…
Error Correcting Code
Our ECC generator is based on the HAMMING algorithm which enables at once detecting 2 errors and correcting one error per word.
Flexibility
| Generator flexibility |
Min |
Max |
Granularity |
| Memory Bit Capacity |
1 M |
8 M |
NA |
| Number of Words |
16 k |
512 k |
8 |
| Number of Bits per Word |
8 |
128 |
1 |
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