sROMet uHDeLL Phoenix 90 nm
This metal-programmable ROM through a single layer stars proprietary architecture PHOENIX optimized for ultra-low-leakage embedding smart and optimal pre-charge circuitries enabling around 300 MHz in worst case in TSMC 90 nm LP!
It embeds a key patent for reaching high-density with only one programming layer, especially dedicated to deep submicron technologies!
Positioning & Differentiators
Key Features
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Ultra-low-leakage even in a generic process:
- No leakage in memory plane
- Minimal leakage in memory periphery while achieving between 230 and 300 MHz in worst case in TSMC 90 nm LP !
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Key patent for high density with only one programming layer
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Optimized for high DfY i.e. no compromise at the cost of design margins such as read margin
Add-ons & Peripherals (optional )
Scrambling
A scrambling feature customized for each customer according to specific needs: it may include various protection structures involving addressing systems for word-lines, bit-lines, memory bit-cells…
Error Correcting Code
Our ECC generator is based on the HAMMING algorithm that enables to detect 2 errors and correct one error per word.
Flexibility
| Generator flexibility |
Min |
Max |
Granularity |
| Memory Bit Capacity |
16 k |
1 M |
NA |
| Number of Words |
1 k |
64 k |
1 |
| Number of Bits per Word |
8 |
128 |
2 |
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