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Catalogue > LP-DV Panoply 180 nm > SESAME eLC DV TSMC 180 nm G

SESAME eLC DV TSMC 180 nm G

 

Dual Voltage

High Speed

Patented

A DUAL VOLTAGE LIBRARY FOR IMPRESSIVE POWER REDUCTION!

Reducing the overall power consumption of a SoC is a critical issue for SoC designers, especially for battery-powered applications.
SESAME eLC DV is the result of Dolphin’s 20 years' low power expertise. As opposed the usual so-called ”dual voltage” libraries which are only basic libraries characterized at lower voltage, the architecture of SESAME eLC DV is specifically designed to enable robust dual voltage operation, with characterizations taking into account physical phenomena linked to low voltage. SESAME eLC DV is characterized for 1.8V +/-10% and 1.1V +/-10%

Thanks to its patented implementation, SESAME eLC DV is the optimal solution for applications such as Wireless Sensors, low power MCUs, RFID or Medical.

 

Positioning & Differentiators

positionning

Just like a camel, the eLC DV library relies on low power anatomy and two energy humps

stamp

Key Benefits

  • Power consumption is divided by up to 5
    • Standard cells optimized for low-power at the schematic level
    • Battery life increases
    • Decrease of heat and life stress of the circuit
  • Leakage is divided by up to 2
  • Safe and Patented low voltage operation
  • High speed optimized architecture for critical designs
  • High routability
    • Only Metal 1 is used in layout
    • Clever I/O pins placement
positionning

 

 

SoC ROUTING allowed upwards from Metal1 Compatible with 1P3M SoC Best performances with 1P5M SoC


 

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