SESAME eLC SMIC 180 nm EEPROM
Low Power |
High Speed |
Patented |
A LIBRARY FOR IMPRESSIVE POWER REDUCTION!
The rising demand for battery-powered and RF applications requires library providers to offer innovative solutions based on new design techniques to lower the overall power consumption of a SoC.
SESAME eLC addresses this need by dramatically reducing power consumption compared with other solutions, while offering the possibility to operate at very high speed.
SESAME eLC is the optimal solution for markets like Medical, Wireless, Mobile Phone, RFID, Smart Card or Portable Multimedia!
Positioning & Differentiators
Just like a crocodile, the eLC library is low
energy consuming
Key Benefits of the eLC Stem
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Ultra Low Power consumption
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,5 times less dynamic power consumption at nominal voltage in comparison with standard 7-Track library
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Standard cells optimized for low-power at the schematic level
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Battery life increases
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Decrease of heat and life stress of the circuit
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Leakage is divided by up to 2
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High speed optimized architecture for critical
designs
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High routability & Less silicon
- Only Metal 1 is used in layout
- Compatible with 1P3M SoC implementation
- Clever I/O pins placement
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Easy architectural implementation
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The Dolphin quality
- Silicon Proven architecture
- Patented solution: Reduction of power consumption through decreased sensitivity to clock edge and delay variation
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Part of the HD-LP Panoply
- spRAM, dROMet, associated and optimized Linear Regulators (iLR) and Switching Regulators (eSR)
SoC ROUTING allowed upwards from Metal1 Compatible with 1P3M SoC Best performances with 1P5M SoC
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