Catalogue > HD-LP Panoply 180 nm > 1PRFile CALYPSO Generator SMIC 153 nm G 1PRFile CALYPSO Generator SMIC 153 nm G Preliminary   Implementing a SoC with a minimal number of metal layers can be a major challenge for SoC integrators of some highly constrained circuits: standard cell libraries are very hard to route in 1P3M and finding 1P3M memories is a challenge which most SoC Integrators face on the own... Fortunately, the solution is introduced with the CALYPSO architecture of One Port Register File, designed to complement the absolutely highest density uHD-BTF standard cell library. CALYPSO incorporates the latest architectural innovations from Dolphin Integration, for designing a compact and reliable 3LM memory architecture. CALYPSO leaves metal 4 and above free to ensure more efficient place and route and to reduce significantly the overall die-cost of application such as image sensors devices integrating SoC with only 2 or 3 metal layers available for routing.   Positioning & Differentiators     Key Benefits Flexible architecture Column-mux options can be chosen Wide flexibility for words and bits per word Reduced die cost Ultra high density: up to 30% denser than standard memory register! Designed with the uHD bit-cell from foundry 3LM architecture with routing allowed upwards from Metal 3 Power reduction features Flexible power routing: power ring or ring-less Optional Byte write support for width up to 144 bits Optional bit-wise write support up to 40 bit wide Low Voltage and Dual Voltage variants are also available: reliable operation down to 1.0V! Decrease of Time-To-Market Layout compatibility with shrink processes Layout compatibility between various foundries Part of the “1P4M Top Panoply” Single via-programmable ROM Density optimized standard cell library Optimal Design for Yield Design methodology ensuring High-Yield circuits despite Mismatch           Available modes and Add-ons Byte mode - optional For more flexibility towards ultimate power savings, the capability of Byte-mode can be implemented in the RAM for write operations. HD BIST - optional The most efficient testing solution for industrial fabrication test of instances. Flexibility Generator flexibility Min Max Granularity Memory Bit Capacity 128 64 k NA Number of Words 4 2 k 2 Number of Bits per Word 8 128 2   Ask for more information, please click here

Standard cells Memories

| Home Page | General Sales Terms and Conditions | Privacy Policy | Site Map |