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Catalogue > LP-LV Panoply 130 nm > SpRAM Haumea LV 130 G generator

SpRAM Haumea LV 130 G generator

 

Low fabrication costs

Low Power

Dual Voltage

 

Despite dynamic power reduction made possible by more advanced process nodes, the increasing complexity of designs results in a real challenge to get power consumption back in control.

To address this power challenge, a solution is to select a multiple voltage architecture with blocks running independently at different voltages depending on the operating modes and frequency targets. However, this demands a complete solutions for all elements of the logic design.

The solution is introduced with a complete Low Voltage Panoply of memories, registers and standard cells by Dolphin Integration. The Low Voltage Panoply is characterized for 0.9 V +/-10% for the 130 nm technological process and includes:

  • The Speed optimized Standard Cell Library, SESAME HD LV.
  • The One Port Register File (1PRFile) Aura LV architecture optimized for high density and speed.
  • The spRAM Haumea LV architecture optimized for low dynamic power and density.

A Dual Port complement to the Panoply is under development.

 

Positioning & Differentiators

positioning
deliverable

Key Benefits

  • Power reduction features
    • Low voltage capability: power consumption is divided by 2 in comparison with traditional solutions
    • Data retention mode
    • Stand by mode
    • Flexible power routing: power ring or ring-less
    • Byte write/read capability
  • Decrease of fabrication costs
    • 1P3M with routing allowed from metal 4 and above
    • High density memory: up to 5% denser compared with free memories
  • Part of the “Low Voltage Panoply”
    • spRAM Haumea LV
    • HS-BTF LV standard cell library
    • 1PRFile Aura LV
    • Associated and optimized Linear Regulators (LRL)
  • Optimal Design for Yield
    • Read margin optimized instance by instance
    • Design methodology ensuring High-Yield circuits thanks to validation of corners including foundry mismatch (P,V,T,M)
    • Association with LRL for regulated power supply voltages
    • Optional BIST for industrial fabrication test of instances


Flexibility

Generator flexibility
Min
Max
Granularity
Memory Bit Capacity
16 k
512 k
NA
Number of Words
2 k
16 k
256
Number of Bits per Word
8
32
2

 

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