1PRFile BDS Aura generator SMIC/TSMC 130 G
To maintain or increase their market share, designers of high density consumer and nomadic devices must regularly offer more features to their end customers - while maintaining competitive pricing. Finding the best compromise between lower power and reduced cost is a significant challenge for SoC designers.
The solution is introduced with a complete Panoply optimized for High Density and Low dynamic Power.
The Panoply includes Single Port and Dual Port Memory Arrays, metal programmable ROMs, Single Port and Dual Port Memory Registers and unique standard cells.
The Aura architecture of single port memory registers (1PRFile) allows power and cost reduction while satisfying the speed constraint of many high speed applications for consumers (gaming or DTV for example) and some nomadic devices like advanced cell phones.
A Low Voltage and a Dual Voltage variant of this architecture are also available.
Positioning & Differentiators
Key Benefits
Available modes and add-ons
Byte mode - optional
For more flexibility towards ultimate power savings, the capability of Byte-mode can be implemented in the RAM for write operations.
HD BIST - optional
The most efficient testing solution for industrial fabrication test of instances.
Flexibility
| Generator flexibility |
Min |
Max |
Granularity |
| Memory Bit Capacity |
128 |
64 k |
NA |
| Number of Words |
4 |
2 k |
2 |
| Number of Bits per Word |
8 |
128 |
2 |
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