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silicium estimator

Benchmark

 

On-line benchmarking of RagTime memories!

 

Comparing objectively memory generators, within the same process or astride two different processes, remains a multidimensional task for designers. In fact, relying on the sole data as commonly provided by memory suppliers may limit the objectivity of the comparison. To that end, we propose to you a benchmark method for comparing efficiently and objectively memory generators.

 

The problem is that:

  • each supplier may deliver its evaluation results based on different assumptions!
  • each supplier may pick and choose its best local instances for a fake yardstick!
  • each supplier may pick and choose its best weights for biasing statistics!

 

The underlying questions are:

  • How to cope with a generator with several thousands of memory instances whereas providers propose one or two of the most regular memory instances for comparison?
  • About the generators to compare, are same process conditions used for performance data delivered?
    • Is power consumption calculation based on maximum parasitic extraction values?
    • Does the memory area include power supply rails?
  • About the comparable generators, are the delivered performance data based on the same calculation method?
    • What are the test vector assumptions for computing power consumption?
    • Are performances given for the same aspect ratio knowing as speed and power consumption may vary drastically from an aspect ratio to an other?

⇒ The quest for The “ROM Benchmark”
⇒ The quest for The “RAM Benchmark”

 

In search of The yardstick for consumption

 

Due to the lack of transparency of benchmarks for ViC, it is impossible to perform serious comparative evaluations… Here are some yardsticks with respect to power-consumption of embedded memories!

 

Key issues for static consumption

  • Which static consumption among the followings:
  • Static = Leakage?
  • Measure in which mode :
    • Sleep mode : inputs/clock toggling or not? (RAM)
    • Operating mode (RAM)
    • Standby mode (RAM/ROM)
  • Stand-by leakage (RAM/ROM)
  • Benchmarking by
    • Computation fom DRM target or silicon data
    • DC/transient Simulations with Spice Models
a

 

Key issues for dynamic consumption

  • Power consumption from:
  • Dynamic operation:
  • Measure in which mode :
    • Use conditions of the SoC in which the ViC will be inserted
    • Read Margin issue
  • Dynamic NOP (No OPeration)
  • Stand-by leakage
  • Benchmarking by
    • Computation
    • Simulation
a

 

DOLPHIN Benchmarking technique

 

Considering the seriousness of competitive evaluation, we have reviewed our benchmarking technique. Due to the important decision prospective users have to make, the relevance of choosing the appropriate benchmark for low power-consumption, specific to a system application, must be pointed out.

Until now, the product-oriented developers’ approach consisted in using ultra-pessimistic evaluators, which explains a number of sad surprises when “deceived” users had compared DOLPHIN figures for comparison against unspecified benchmarks.

A constructive proposal for RAMs/ROMs is presented on the RAMs/ROMs benchmark pages as explicit Benchmarks; they can be seen as an implicit question as to our prospects’ and customers’ preference for a reasonable but thorough benchmark capturing their own needs for RAMs/ROMs as far as low power-consumption is concerned.

These RAM/ROM Benchmarks could be replaced by any other more relevant.

If some user’s benchmark of choice were to differ strongly from average expectations on the reverse, established with uniform distributions, a separate sheet describes the use of SUCCESS™ for hardware-software cosimulation for assessing memory power-consumption.