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Success Stories

 

Some exemples from 25 years experiences

 

High Resolution ASIC sensor interface

layout

8 channel ADC + decimation filtering + SPI interface with 85dB resolution - see OctAD-16 for more details / in volume fabrication
ADC with 118 dB resolution for measurement applications in low frequency domain + auxiliary ADC for monitoring / in industrialisation
ADC with 120 dB resolution in closed loop with an accelerometer  + auxiliary ADC for monitoring / in industrialisation


 

Low Power and Low Noise

layout

Composite (standard cell + memory) and extinction power islet / prototypes
Internal Silicon Qualifiers for low noise / prototypes

ADC with less than 10 mW (power supply 3.3V) for measurement applications / in industrialisation


 

Rad–Hard Demonstrators

layout

Mixed Signal circuit integrating ADC, DAC, SERDES and 250 memory instances for telecom application
Pure logic circuit with rad hard chains and specific clock tree distribution


 

Complex matrix for patent demonstration

layout

Digital direct display driver (16x16 pixels) with 768 DACs and 1148 IO pads / prototypes
Logic circuit to control a matrix of pixels / prototypes


 

FPGA to ASIC Transfer

layout

Complex logic circuits with memories / in volume fabrication