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7 services > From ViCs to Super ViC

From ViCs to Super ViC

 

Guarantee of performances

Smoother integration

 

Harmonie offers 25 years of experience in SoC integration to the customers of Dolphin Virtual Component of IP (ViC) by providing them with whatever clustering of needed ViCs thanks to state-of-the-art savvy for high performance SoCs. As a result, Dolphin’s Super ViC can star a strong added value and Harmonie can build, with SoC Integrators with a license for some famous CPU, a partnership by sharing complementary skills.

 

Seven services

HARMONIE SPECIFIC KNOW-HOW

ANALYSIS

  • Mastery of Integration Risks with solutions for avoiding performance degradations and functionality issues
    • Power Management Network (PMN) with appropriated regulators for a low BoM and a guarantee of each ViC performances
    • Bug Tracking Network for simulating the over-all super ViC. It includes Built-In Self Characterization and Profile versus Template matching
  • Identification and implementation of detectors intra-ViC (•) and extra-ViC (•) for a verification of the super ViC (see schematics)

IMPLEMENTATION

  • Dolphin provides secret weapons for enhancing existing platforms: the SGROOGE family, for power and noise analysis
    • SCROOGE XXL at architectural level
    • SCROOGE EPA for Early Power Assessment and SCROOGE ENA for Early Noise Assessment at structural level
  • Choice of appropriated ViCs for controlling and limiting issue as jitter, power supply, noise etc.

MODELING

  • Harmonie provides a SoC model in power consumption and noise from the ViC models thanks to simulations through SCROOGE EPA & ENA
  • A guarantee of performances at application schematics level through the Application Hardware Modeling approach, the smartest means for validating the super-ViC performances (jitter, Pop-up Noise, SNR etc.) in the complete system

ADDITIONAL OFFERING

  • Facilitating the industrial test for reduced test costs
    • Failure Testing Network for helping hardware and software development and test. Includes Built-In Real-Time Debug and Built-In Self Test
  • SoC Characterization with its application schematics:
    • to assess the Virtual Fabrication Process
    • to assess the impact on the SoC performances of the application environment
    • to perform a diagnostic

SUPPORT SYSTEM and ADDED VALUE for the Super ViC IMPLEMENTATION

  • CAE and FAE competencies for a modeling at multi-level and multi-domain

To go further: Harmonie provides its knowledge in integration through the super ViCs, but also the complete design from FPGA to application schematic. The access to multi foundry with no minimum amount of order will enable a wide range of customer to rely on Harmonie for a low volume of production as for a high volume of fabrication. Harmonie takes in charge the relationship with foundry, assembly and test houses and then provides its customer with the best trade-off cost versus yield.

 

SUCCESS STORIES

Apparent Memory

High resolution audio

 

The super ViC for an irreplaceable Apparent Memory

  • Main concern: reduce the power consumption due to the access to its memories and accelerate the speed of {the MCU + background memory}
  • Memories accesses optimized
  • Detectors for maintaining the data rate of the cache controller (•)
  • Complete solution, for insuring the availability of the cache and the tag memories, with a customized trade-off for choosing the cache memory capacity
  • Easier integration for the customer: 2 interfaces to connect (background memory and MCU) instead of 4 (cache & tag memories) - possibility for including the MCU in the super ViC (only one interface to handle for the customer)
  • A Power Management Network (PMN) for insuring the power supply for each component, validated by the power consumption analysis solution: SCROOGE EPA (Early Power Assessment)

 

7 services

super ViCs for High resolution audio

  • Main concern: maintain the performances of the high resolution converter at the system level
  • Definition of a black-box representing the critical connections and components and validation of the super-ViC performances at black-box level
  • Detectors for validating profiles versus templates (•)
  • A PMN for insuring the power consumption budget:
    • Use of efficient DC-DC
    • Use of Low Drop-Out (LDO) regulators offering a clean supply for protecting the ADC from the power source noise
  • Easier integration for the customer:
    • The critical verifications are performed (jitter, power supply noise, load current) with the application schematics
    • Less constraints for the clock source and power supply source